Circuit arrangement for protected data transmission,...

Details Circuit arrangement for protected data transmission,... Circuit arrangement for protected data transmission,...

2006-12-19

2006-12-19

Baderman, Scott (Department: 2114)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

C714S047300, C700S108000

Reexamination Certificate

active

07152188

ABSTRACT:
The present circuit arrangement allows data, which are necessary for building up fault-tolerant structures, to be transmitted on standard ring-shaped bus systems. Its implementation requires a monitoring unit and input and output units which transmit or receive data for control. The circuit arrangement handles the task of detecting any faults which can become a danger for the process within a machine or plant. Due to its internal configuration, the circuit arrangement identifies any fault even before the detection of the fault and initiates a protected switch-off. In this arrangement, it is of no importance whether it is the external control unit or the bus system used which is responsible for the fault.

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patent: 6385562 (2002-05-01), Roth et al.
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