Circuit arrangement for operating a semiconductor memory system

Details Circuit arrangement for operating a semiconductor memory system Circuit arrangement for operating a semiconductor memory system

1976-03-01

1978-05-16

Canney, Vincent P.

Static information storage and retrieval

Systems using particular element

Flip-flop

365175, 365189, G11C 1140, G11C 700

Patent

active

040902552

ABSTRACT:
The invention relates to a circuit arrangement for operating the read/write cycles of an integrated semiconductor memory storage system whose storage cells consist of flip flops with bipolar switching transistors, Schottky diodes as read/write elements coupling the cell to the bit lines, and high-resistivity resistors, or transistors controlled as current sources, as load elements, in several phases.
This is accomplished through coupling the storage cell to both read/write circuits and restore/recovery circuits via the bit lines and by selective pulsing of the cell with the read/write circuits and the restore/recovery circuits.
This permits high speed, low operating current, large scale memory systems to be built.

REFERENCES:
patent: 3067336 (1962-12-01), Eachus
patent: 3177374 (1965-04-01), Simonian et al.
patent: 3284782 (1966-11-01), Burns
patent: 3292008 (1966-12-01), Rapp
patent: 3363115 (1968-01-01), Stephenson et al.
patent: 3447137 (1969-05-01), Feuer
patent: 3518635 (1970-06-01), Cole et al.
patent: 3588848 (1971-06-01), Van Beck
patent: 3806898 (1974-04-01), Askin
patent: 4023148 (1977-05-01), Hueber et al.

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