Static information storage and retrieval – Read/write circuit – Signals
Reexamination Certificate
2006-09-05
2006-09-05
Phung, Anh (Department: 2824)
Static information storage and retrieval
Read/write circuit
Signals
C365S233100
Reexamination Certificate
active
07102940
ABSTRACT:
One embodiment of the invention relates to a circuit arrangement for regulating a latency that is defined as a whole number n of periods T of a reference clock of frequency fcand is intended to elapse, as of a data transmission command, before the data which are to be transmitted from a data source appear at the end of the data path that is to be passed through and contains a chain of transmission elements having fixed delay times. The frequency fcmay be set in a range from 1/Tmaxto 1/Tmin, where Tminis at least equal to τf
and τfis equal to the sum of the fixed delay times in the data path. The data path is subdivided into n successive sections, each of which contains, at its input, a clock-controlled sampling element for accepting the data to be transmitted and has a propagation time that is considerably shorter than Tmin. The propagation time τnof the last section (Sn) is considerably greater than zero. The clock of the sampling elements is controlled using a version of the reference clock that has been delayed by T−τn.
REFERENCES:
patent: 5796673 (1998-08-01), Foss et al.
patent: 5978284 (1999-11-01), Pawlowski
patent: 6128248 (2000-10-01), Idei et al.
patent: 6262938 (2001-07-01), Lee et al.
patent: 6327217 (2001-12-01), Chung
patent: 6804165 (2004-10-01), Schroegmeier
patent: 102 08 715 (2003-09-01), None
Ho-Jun Song et al.,A 200 MHz Register-Based Wave-Pipelined 64M Synchronous DRAM, IEEE Journal of Solid-State Circuits, vol. 32, No. 1, Jan. 1997.
Infineon - Technologies AG
Patterson & Sheridan L.L.P.
Phung Anh
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