Circuit arrangement

Details Circuit arrangement Circuit arrangement

2005-12-06

2005-12-06

Lin, Sun James (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000

Reexamination Certificate

active

06973629

ABSTRACT:
Fuses that selectively disable functional blocks of a circuit are arranged in a multistage structure, wherein if any fuse element in the multistage structure permanently switches off a part of the circuit, no other fuse element in the multistage structure can affect the switching off of the part. Master fuses are provided to selectively disable corresponding stages of the multistage structure. Preferably, the master fuses are arranged in a hierarchy, so that a master fuse at a higher level of the hierarchy selectively disables all of the stages at lower levels of the hierarchy.

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