Circuit architecture for an integrated circuit

Electronic digital logic circuitry – Multifunctional or programmable – Array

Reexamination Certificate

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Details

C326S037000, C326S038000, C326S039000, C326S040000, C326S047000, C326S093000, C708S523000, C708S551000, C708S490000, C708S501000, C708S503000

Reexamination Certificate

active

07728624

ABSTRACT:
An integrated circuit comprising at least one group comprising having multiple arithmetic/logic units arranged in sub-groups. In the sub-groups at inputs of multiple arithmetic/logic units, in each case a single one of the first selection units is connected on the input side, wherein no other selection unit is connected directly on the input side of this selection unit. The first selection units are coupled to each other such that a horizontal and/or vertical logical interconnection of the arithmetic/logic units within a group, and/or a logical interconnection of arithmetic/logic units to an upstream group can be implemented. Second selection units are in each case connected on the output side of a column of arithmetic/logic units. The second selection units of a group are connected on the output side to one bus each, and a microprocessor is coupled to this bus.

REFERENCES:
patent: 4758985 (1988-07-01), Carter
patent: 5355508 (1994-10-01), Kan
patent: 6118298 (2000-09-01), Bauer et al.
patent: 6496916 (2002-12-01), Fadavi-Ardekani et al.
patent: 2004/0158598 (2004-08-01), Hong et al.
patent: 2004/0178818 (2004-09-01), Crotty et al.
patent: 2005/0038844 (2005-02-01), Langhammer et al.
patent: WO 03/105345 (2003-12-01), None

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