Circuit and technique to stall the communication of data...

Details Circuit and technique to stall the communication of data... Circuit and technique to stall the communication of data...

2006-06-27

2006-06-27

Perveen, Rehana (Department: 2112)

Electrical computers and digital data processing systems: input/

Intrasystem connection

C710S305000, C713S322000, C327S154000

Reexamination Certificate

active

07069359

ABSTRACT:
An apparatus includes a first circuit and a second circuit. The first circuit receives indications of first data that is associated with a first data set and second data that is associated with a second data set. The second circuit is coupled to the first circuit to cause the first circuit to in a first mode, communicate indications of the first data to an output terminal in synchronization with a first phase of a clock signal and communicate indications of the second data to the output terminal in synchronization with a second phase of the clock signal. In a second mode, the second circuit causes the first circuit to communicate the indications of the first data to the output terminal in synchronization with the first phase and prevent communication of the second data during the second phase.

REFERENCES:
patent: 5994931 (1999-11-01), Heinen et al.
patent: 6049883 (2000-04-01), Tjandrasuwita
patent: 6247134 (2001-06-01), Sproch et al.

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