Circuit and method for writing in a semiconductor memory device

Details Circuit and method for writing in a semiconductor memory device Circuit and method for writing in a semiconductor memory device

1982-01-27

1985-01-08

Moffitt, James W.

Static information storage and retrieval

Read/write circuit

For complementary information

365154, 365194, G11C 700, G11C 1140

Patent

active

044930593

ABSTRACT:
A semiconductor memory device including static memory cells connected at intersections of word lines and pairs of bit lines, in which writing is carried out by changing the potentials of the paired bit lines according to writing data of binary digits "1" and "0" and turning on one transistor of a memory cell while turning off the other transistor of the cell. A characteristic feature of the invention is that, according to the write data, one of the paired bit lines is maintained at a low level while the other bit line is simultaneously maintained at a high level, and the period of maintenance of the high level is shorter than the period of maintenance of the low level.

REFERENCES:
patent: 3919566 (1975-11-01), Millhollan et al.
patent: 4168539 (1979-09-01), Anderson
patent: 4272811 (1981-06-01), Wong
Beranger et al., "Read and Write Circuits For a Harper Cell Memory", IBM Tech. Disc. Bul., vol. 21, No. 10, 3/79, pp. 4066-4067.

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