Static information storage and retrieval – Read/write circuit – Including specified plural element logic arrangement
Reexamination Certificate
2006-08-29
2006-08-29
Phung, Anh (Department: 2824)
Static information storage and retrieval
Read/write circuit
Including specified plural element logic arrangement
C365S154000
Reexamination Certificate
active
07099203
ABSTRACT:
A circuit and a method for writing a binary value to a memory cell are provided. The circuit includes a first field-effect transistor having a first drain, a first drain, and a first gate operably coupled between the first drain and the first source. The first drain is operably coupled to a first memory cell. The first gate configured to receive a first data signal. The circuit further includes a second field-effect transistor having a second drain, a second source, and a second gate operably coupled between the second drain and the second source. The drain source is operably coupled to the first memory cell. The second gate is configured to receive a second data signal. The circuit further includes a first signal inverter having a first input terminal and a first output terminal. The first output terminal is operably coupled to both of the first and second sources. The first signal inverter is configured to output a first control signal on the first output terminal when the first input terminal receives a second control signal. When the first control signal has a second logic level and the first data signal has a first logic level and the second data signal has the second logic level, the first and second field-effect transistors induce the first memory cell to store a first binary value.
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Bunce Paul A.
Davis John D.
Plass Donald W.
Cantor & Colburn LLP
Kinnaman, Jr. William A.
Phung Anh
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