Static information storage and retrieval – Read/write circuit – Bad bit
Reexamination Certificate
2011-02-18
2011-12-20
Yoha, Connie (Department: 2827)
Static information storage and retrieval
Read/write circuit
Bad bit
C365S201000, C365S189011
Reexamination Certificate
active
08081529
ABSTRACT:
A method and system for high speed testing of memories in a multi-device system, where individual devices of the multi-device system are arranged in a serial interconnected configuration. High speed testing is achieved by first writing test pattern data to the memory banks of each device of the multi-device system, followed by local test read-out and comparison of the data in each device. Each device generates local result data representing the absence or presence of a failed bit position in the device. Serial test circuitry in each device compares the local result data with global result data from a previous device. The test circuitry compresses this result of this comparison and provides it to the next device as an updated global result data. Hence, the updated global result data will represent the local result data of all the previous devices.
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Borden Ladner Gervais LLP
Chakrapani Mukundan
MOSAID Technologies Incorporated
Yoha Connie
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