Excavating
Patent
1995-06-27
1997-09-02
Beausoliel, Jr., Robert W.
Excavating
371 70, 324 7641, 324 7648, G01R 2300, H03D 1300
Patent
active
056639708
ABSTRACT:
A method and apparatus are provided for testing whether an electronic circuit, or DUT, for generating a clock signal is generating a signal of a frequency within a regulated frequency range. The method includes the steps of: supplying a driving clock or signal to cause the circuit to be tested to generate test clock signals as designed; causing a clock generator to generate an upper limit frequency clock signal and a lower limit frequency clock signal based on the clock signal of the circuit; simultaneously counting the testing clock signal of the circuit, the upper limit frequency clock signal and the lower limit frequency clock signal of the clock generator, and generating resultant signals upon the count reaching certain numbers; and issuing a pass signal when a count result of the upper limit frequency clock signals is output first, and a count result of the testing clock signal of the circuit is output next, and otherwise issuing a fail signal.
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Beausoliel, Jr. Robert W.
Iqbal Nadeem
LG Semicon Co. Ltd.
Loudermilk Alan R.
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