Circuit and method for testing direct memory access circuitry

Details Circuit and method for testing direct memory access circuitry Circuit and method for testing direct memory access circuitry

1993-05-11

1995-06-06

Atkinson, Charles E.

Excavating

371 212, G01R 3128, G06F 1100

Patent

active

054230292

ABSTRACT:
Disclosed are an apparatus and method for testing a direct memory access ("DMA") controller. The apparatus comprises (1) a virtual control device including a virtual control latch, the virtual control device coupled to a request input of the DMA controller and capable of transmitting a signal to the DMA controller representing a request to transfer data and (2) a virtual input/output ("I/O") device including a virtual I/O latch, an acknowledgement output of the DMA controller coupled to the virtual I/O device, the virtual I/O latch capable of storing the data for use by the DMA controller. In its preferred embodiment, the present invention operates within the confines of IBM-compatible personal computer architecture, allowing DMA controller functionality to be tested directly.

REFERENCES:
patent: 5161162 (1992-11-01), Watkins et al.
patent: 5313626 (1994-05-01), Jones et al.

Affiliated with

Also associated with

Rating

Circuit and method for testing direct memory access circuitry does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Circuit and method for testing direct memory access circuitry, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Circuit and method for testing direct memory access circuitry will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-994333