Circuit and method for signal processing

Details Circuit and method for signal processing Circuit and method for signal processing

1996-11-06

1999-01-12

Santamauro, Jon

Electronic digital logic circuitry

Clocking or synchronizing of logic stages or gates

326 83, 326 98, 327 23, H03K 1900, H03K 19096

Patent

active

058595465

ABSTRACT:
An exclusive OR circuit is provided which detects whether or not a preceding-stage logical output value and a subsequent-stage logical output value agree. When these logical output values are found to agree, a NAND circuit functions to cut off the supply of a clock signal to a first and second switch circuits and to a latch circuit. Accordingly, when there occur no data changes between clock signal cycles, in a switch circuit and a latch circuit both arranged between each stage of a pipeline, the charge/discharge of the capacitance of gate electrodes of transistors forming these circuits is prevented, thereby reducing power consumption.

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