Static information storage and retrieval – Read/write circuit – Testing
Patent
1992-08-20
1994-12-06
LaRoche, Eugene R.
Static information storage and retrieval
Read/write circuit
Testing
365900, 365185, 36518907, 365210, G11C 700
Patent
active
053717066
ABSTRACT:
The circuit and method of this invention provide for rapid and reliable detection of depleted or nearly-depleted cells in a column. The circuit is formed on the substrate of a nonvolatile, integrated-circuit memory including rows and columns of memory cells. The drain of each memory cell is connected to a drain-column line and the control gate that is connected to a wordline. One input of a sense amplifier is connected to the drain-column line. The other input of the sense amplifier is connected to a current reference formed on said substrate. The wordline is connected to a wordline test voltage and the output of the sense amplifier is coupled to an output pin of the integrated circuit. The current through the drain-column line is compared with the current through the current reference and, if the current through the drain-column line is sufficiently close to the current through said current reference, a signal is transmitted to an output pin of the integrated circuit.
REFERENCES:
patent: 5043940 (1991-08-01), Harari
patent: 5056063 (1991-10-01), Santin et al.
patent: 5293333 (1994-03-01), Hashimoto
patent: 5299166 (1994-03-01), Suh et al.
Krentz Steven V.
Tatman David A.
Donaldson Richard L.
Heiting Leo N.
Hoang Huan
LaRoche Eugene R.
Lindgren Theodore D.
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