Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Reexamination Certificate
2008-05-28
2010-02-02
Ho, Hoai V (Department: 2827)
Static information storage and retrieval
Addressing
Particular decoder or driver circuit
C365S230040
Reexamination Certificate
active
07656742
ABSTRACT:
Provided are a circuit and method for sampling a valid command using a valid address window extended for a high-speed operation in a double pumped address scheme memory device. A method for extending the valid address window includes: inputting a valid command signal and a first address signal at the first cycle of a clock signal; inputting a second address signal at the second cycle of the clock signal; generating a decoded command signal and extended first and second internal address signals respectively in response to the command signal and the address signals; and latching and decoding the extended first and second internal address signals in response to the decoded command signal.
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Jang Seong-Jin
Kim Hyun-Jin
Lee Woo-Jin
Lim Jeong-Don
Park Kwang-Il
Ho Hoai V
Samsung Electronics Co,. Ltd.
Tran Anthan T.
Volentine & Whitt PLLC
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