Circuit and method for retaining DRAM content

Details Circuit and method for retaining DRAM content Circuit and method for retaining DRAM content

1995-06-06

1996-12-31

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Data refresh

365226, 365229, G11C 700

Patent

active

055900828

ABSTRACT:
For a DRAM provided with a self-refreshing function, self-refresh starting operations and execution of the self-refresh mode are performed when the power supply voltage is cut off thereby achieving battery backup of the DRAM. This is achieved by detecting when the power supply voltage is at the lowest voltage at which normal data transfer can be performed. The operations carried out by the DRAM control circuit relate to stopping transfer of the following data after completing any transfer that was in the course of execution, executing refreshing, and establishing the self-refresh mode. All except for the last function are preceding processes for self-refreshing. Then, when the voltage of the power supply is determined to be in the proximity of the lowest voltage at which the DRAM drive circuit can perform normally, the drive circuit is disabled and the RAS and CAS signals of the drive circuit go low by means of pull-down resistors so that the self-refresh mode is established.

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