Circuit and method for replacing a defective memory cell with a

Static information storage and retrieval – Read/write circuit – Bad bit

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3652257, 36523006, G11C 2900

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active

057711950

ABSTRACT:
A memory access circuit is provided for isolating a matrix memory cell from and coupling a redundant memory cell to a data line when the matrix memory cell is defective. The memory access circuit includes a matrix switch that is coupled between the matrix memory cell and the data line. When the matrix memory cell is defective, a matrix-switch control circuit opens the matrix switch to isolate the defective memory cell from the data line. The memory access circuit also includes a redundant switch that is coupled between the redundant memory cell and the data line. When the defective matrix memory cell is addressed, a redundant-switch control circuit closes the redundant switch to couple the redundant memory cell to the data line in place of the defective memory cell.

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