Circuit and method for removing interference in digital...

Pulse or digital communications – Receivers – Interference or noise reduction

Reexamination Certificate

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C375S232000

Reexamination Certificate

active

06259751

ABSTRACT:

CLAIM OF PRIORITY
This application makes reference to, incorporates the same herein, and claims all benefits accruing under 35 U.S.C. §119 from an application entitled CIRCUIT AND REMOVING INTERFERENCE IN DIGITAL COMMUNICATION SYSTEM earlier filed in the Korean Industrial Property Office on Jan. 10, 1997, and there duly assigned Serial No. 97-479 by that Office.
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates to a circuit and method for detecting the phase of a received signal and removing interference from the received signal in a demodulation circuit of a digital communications system. More particularly, the invention relates to a circuit for removing interference from the received signal by using an adaptive time domain equalizer.
2. Related Art
Typically, a demodulation circuit in a digital communications system includes a signal processing unit, two mixers, two AID converters and a phase restoring unit. A local oscillator is connected directly to one of the mixers and, through a phase shift unit, to the other of the mixers. A symbol clock restoring unit is connected to each of the A/D converters.
Such a demodulation circuit in a digital communications system has been burdened by disadvantages in the past. As a result, there has been a need to develop a demodulation circuit for a digital communications system, wherein the demodulation circuit further includes an equalizer connected between each of the A/D converters and the phase restoring unit. However, there has been a further problem in that the construction of a logic circuit for restoring phase to the signal being processed is complicated. A further problem resides in the fact that the operational range of the A/D converters cannot be sufficiently utilized. This causes the input to the A/D converters to be reduced, and this results in a quantization error.
Therefore, there is a need to develop a circuit and method for removing interference by restoring phase, and there is a further need to develop such a circuit and method for removing interference so as to reduce quantization error generated by the A/D converters. There is also a need to develop a circuit and method for removing interference of a common signal and an orthogonal a phase signal.
The following patents are considered to be representative of the prior art relative to the present invention, but are burdened by the disadvantage discussed above: U.S. Pat. No. 5,524,124 to Koening, entitled Multiple-Filter Equalizer For Structured Digitally Modulated Signals, U.S. Pat. No. 5,519,727 to Okanoue et al., entitled Adaptive Equalizer, U.S. Pat. No. 5,502,507 to Kim, entitled Equalization Apparatus With Fast Coefficient Updating Operation, U.S. Pat. No. 5,418,816 to Yamamoto, entitled Automatic Equalizer, U.S. Pat. No. 5,394,110 to Mizoguchi, entitled Demodulation System Having Adaptive Matched Filter And Decision Feedback Equalizer, U.S. Pat. No. 5,363,411 to Furuya et al., entitled Low Power Consumption Receiver With Adaptive Equalizer, U.S. Pat. No. 5,251,233 to Labedz et al., entitled Apparatus And Method For Equalizing A Corrupted Signal In A Receiver, U.S. Pat. No. 5,157,690 to Buttle, entitled Adaptive Convergent Decision Feedback Equalizer, U.S. Pat. No. 4,730,343 to Kanemasa et al., entitled Decision Feedback Equalizer With A Pattern Detector, U.S. Pat. No. 4,703,282 to Yoshida, entitled Digital Demodulation System, U.S. Pat. No. 4,468,786 to Davis, entitled Nonlinear Equalizer For Correcting Intersymbol Interference In A Digital Data Transmission System, U.S. Pat. No. 4,320,523 to Horikawa et al., entitled Digital Signal Reception System, and U.S. Pat. No. 4,021,738 to Gitlin et al., entitled Adaptive Equalizer With Fast Convergence Properties.
SUMMARY OF THE INVENTION
It is, therefore, an object of the present invention to provide a circuit and a method for removing interference by restoring phase.
It is another object to provide a circuit and a method for removing interference so as to reduce quantization error generated by an A/D converter.
It is still another object to provide a circuit and a method for removing interference of a common signal and an orthogonal phase signal.
To accomplish the above objects, the present invention provides a circuit and method for removing interference in a digital communications system. The circuit includes: a signal processing unit for inputting a given signal and limiting the band of the signal, thereby distributing the signal to be outputted; a local oscillator for producing a carrier wave signal to be outputted; a signal mixer for receiving and mixing the signal outputted from the processing unit and the carrier wave signal outputted from the local oscillator, and providing the mixed signal as an output; an A/D converter for receiving the mixed signal from the signal mixer and for converting it into a digital signal for output; an equalizer for receiving the converted signal outputted from the A/D converter, and for compensating for distortion of the converted signal; and a signal restoring unit for receiving the distortion-compensated signal from the equalizer, for detecting the phase of the distortion-compensated signal, and for restoring the signal to an original signal.


REFERENCES:
patent: 3644830 (1972-02-01), Ragsdale
patent: 4021738 (1977-05-01), Gitlin et al.
patent: 4320523 (1982-03-01), Horikawa et al.
patent: 4468786 (1984-08-01), Davis
patent: 4703282 (1987-10-01), Yoshida
patent: 4707841 (1987-11-01), Yen et al.
patent: 4713829 (1987-12-01), Eyuboglu
patent: 4730343 (1988-03-01), Kanemasa et al.
patent: 5157690 (1992-10-01), Buttle
patent: 5251233 (1993-10-01), Labedz et al.
patent: 5363411 (1994-11-01), Furuya et al.
patent: 5394110 (1995-02-01), Mizoguchi
patent: 5418816 (1995-05-01), Yamamoto
patent: 5502507 (1996-03-01), Kim
patent: 5519727 (1996-05-01), Okanoue et al.
patent: 5524124 (1996-06-01), Koenig
patent: 5870432 (1999-02-01), Kerckhove
patent: 5880629 (1999-03-01), Maeda
patent: 6044107 (2000-03-01), Gatherer et al.

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