Circuit and method for reducing a compensation of a ferroelectri

Static information storage and retrieval – Systems using particular element – Ferroelectric

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36518901, G11C 1122

Patent

active

055924107

ABSTRACT:
A circuit and method for reducing compensation of a ferroelectric capacitor in a cell of a memory array allows the capacitor's hysteresis loop to be repositioned toward its uncompensated position by pulsing the electrodes of the memory cell capacitors, via the memory array plate line, one or more additional times whenever a "write" occurs to the memory array. As a result, the ferroelectric capacitor delivers a signal of greater strength to the memory device sense amps upon a subsequent "read" operation significantly enhancing overall reliability and yield yet without reducing overall device endurance.

REFERENCES:
patent: 4893272 (1990-01-01), Eaton, Jr.
patent: 5270967 (1993-12-01), Moazzami et al.
patent: 5381364 (1995-01-01), Chern
patent: 5530668 (1996-06-01), Chern
Ramtron International Corporation, "Ramtron FM24C16 FRAM.RTM. Serial Memory, Product Review," Colorado Springs, CO., 1994, brochure pp. 1-8.
Ramtron International Corporation, "Ramtron FRAM.RTM. Technology," Colorado Springs, CO., brochure pp. 1 and 2.

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