Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis
Reexamination Certificate
2007-10-02
2007-10-02
Cao, Chun (Department: 2115)
Electrical computers and digital processing systems: support
Clock, pulse, or timing signal generation or analysis
C327S276000
Reexamination Certificate
active
10455717
ABSTRACT:
An output circuit includes a level-change detecting device, a delay adjusting device and a first multiplexer. The level-change detecting device receives the parallel data signal, detects a level change degree of the parallel data signal between a first time point and a second time point, and outputs a select signal according to the level change degree. The delay adjusting device receives a strobe signal and differentially delaying the strobe signal into a first and a second delayed strobe signals with a first and a second delay time, respectively. The first multiplexer is electrically connected to the level-change detecting device and the delay adjusting device, and selects one of the first and the second delayed strobe signals to be outputted in response to the select signal.
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Cao Chun
Tran Vincent T
Via Technologies Inc.
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