Circuit and method for error detection

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

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Reexamination Certificate

active

11179446

ABSTRACT:
A circuit and method efficiently provide detection of corruption of data using an error correcting code (ECC). The circuit includes an ECC checker, a memory arrangement, and a detection circuit. The ECC checker generates a remainder of an ECC check of the data and an ECC value generated from an uncorrupted version of the data. The memory stores a set of values and receives a first portion of the remainder at a first address port and a second portion of the remainder at a second address port. The memory arrangement outputs a first value of the set responsive to a value of the first portion and output a second value of the set responsive to a value of the second portion. The detection circuit generates an error indication in response to the first and second values to indicate whether a single bit of the data is incorrect.

REFERENCES:
patent: 6041430 (2000-03-01), Yamauchi
patent: 7061407 (2006-06-01), Lee

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