Static information storage and retrieval – Read/write circuit – Signals
Reexamination Certificate
2006-05-30
2006-05-30
Nguyen, Van Thu (Department: 2824)
Static information storage and retrieval
Read/write circuit
Signals
C365S233100, C370S519000, C370S517000, C370S516000, C327S395000, C327S400000
Reexamination Certificate
active
07054205
ABSTRACT:
A circuit and method is provided for determining the delay of an integrated circuit common associated with chip-to-chip variations in the manufacturing process, changes in operating voltage, and fluctuations in temperature. A clock signal is inverted, thus generating an inverted clock signal which is then delayed multiple times, resulting in several delayed versions of the inverted clock signal, with each version being delayed a different length of time. The logical state of each delayed version of the inverted clock signal is then stored. That stored logical state provides an indication as to the magnitude of the delay of the integrated circuit which may then be used to tune critical signals of the integrated circuit to avoid timing problems resulting from variations in IC propagation delay.
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Buhler Douglas C.
Cook, III John Howard
Agilent Technologie,s Inc.
Hur J. H.
Nguyen Van Thu
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