Circuit and method for controlling local data line in...

Details Circuit and method for controlling local data line in... Circuit and method for controlling local data line in...

2011-06-21

2011-06-21

Lam, David (Department: 2827)

Static information storage and retrieval

Read/write circuit

Data transfer circuit

C365S189011, C365S205000, C365S230030

Reexamination Certificate

active

07965566

ABSTRACT:
The present invention relates to a semiconductor memory device, and more particularly, to a circuit and method for controlling local data lines, which can reduce loading on local data lines LIO. The circuit and method for controlling local data lines in accordance with the present invention is characterized by having different line loading of local data lines depending on positions of cell mats. In addition, local data lines between arrays are connected by a switch. Accordingly, the switch is turned on/off by address information about cell mat arrays, thereby preventing unnecessary line loading of local data lines to completely remove unnecessary loading. Moreover, the present invention reduces line loading, thereby improving data processing speed.

REFERENCES:
patent: 5598341 (1997-01-01), Ling et al.
patent: 6906972 (2005-06-01), Proell et al.
patent: 6956780 (2005-10-01), Kyung
patent: 10-107097 (1998-04-01), None
patent: 2001-101896 (2001-04-01), None
patent: 1020050106858 (2005-11-01), None
patent: 1020060025776 (2006-03-01), None
Notice of Allowance issued from Korean Intellectual Property Office on Aug. 24, 2009 with an English Translation.

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