Circuit and method for controlling bus arbitration

Details Circuit and method for controlling bus arbitration Circuit and method for controlling bus arbitration

1996-06-24

1998-08-25

Sheikh, Ayaz R.

G06F 1300

Patent

active

057991600

ABSTRACT:
Control over bus arbitration within a data processing system between a plurality of bus devices (101, 102) coupled by a bus (103) is performed in a user programmable manner by implementing logic circuitry that is responsive to a user programmable bit within a register (203) so that when the bit is asserted, the bus device (102) is able to maintain control over access to the external bus (103). Such a technique is useful for permitting a processor (201) to maintain mastership of an external bus (103) with respect to a direct memory access device (101) also coupled to the bus (103).

REFERENCES:
patent: 5404535 (1995-04-01), Barlow et al.
patent: 5471625 (1995-11-01), Mussemann et al.
patent: 5475850 (1995-12-01), Kahn
patent: 5613075 (1997-03-01), Wade et al.
patent: 5630147 (1997-05-01), Datta et al.
IBM Microelectronics Division, PowerPC 403GA, PPC403GA User's Manual, pp. 11-13 and pp. 3-28-3-33.
Motorola 1994 M68060/MC68LC060 and MC68EC060 Microprocessors User's Manual, Rev. 1, Section 7, pp. 7-52-7-71.
Motorola 1995 DSP56300 24-Bit Digital Signal Processor Family Manual, Section 2, pp. 2-16-2-26.

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