Circuit and method for biasing bit lines

Details Circuit and method for biasing bit lines Circuit and method for biasing bit lines

1995-06-07

1998-06-16

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Having fuse element

36518911, 365200, G11C 700, G11C 2900

Patent

active

057682062

ABSTRACT:
A circuit biases an associated pair of bit lines. A fuse is coupled between a biasing voltage and a node. A first load is coupled between the node and a first of the bit lines. A second load is coupled between the node and a second of the bit lines.

REFERENCES:
patent: 4297721 (1981-10-01), McKenny et al.
patent: 5187114 (1993-02-01), Chan et al.
patent: 5257229 (1993-10-01), McClure et al.
patent: 5355340 (1994-10-01), Coker et al.
patent: 5390150 (1995-02-01), Kwak
patent: 5392243 (1995-02-01), Nakamura
patent: 5412606 (1995-05-01), Lee
patent: 5414668 (1995-05-01), Nakashima

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