Circuit and method for aligning transmitted data by...

Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis – Correction for skew – phase – or rate

Reexamination Certificate

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C714S700000

Reexamination Certificate

active

10710264

ABSTRACT:
A circuit and a method for aligning transmitted data by adjusting transmission timing for a plurality of lanes. The method includes utilizing different initial values to reset a count value corresponding to a lane when a plurality of COM symbols are detected on the lane, utilizing an increment value to increase the count value corresponding to the lane when a COM symbol is not detected on the lane, and utilizing a plurality of count values corresponding to the lanes to align transmitted data of the lanes when a COM symbol is not detected on the lanes within a predetermined period of time.

REFERENCES:
patent: 6359815 (2002-03-01), Sato et al.
patent: 6578092 (2003-06-01), Lau et al.
patent: 2002/0009129 (2002-01-01), Choi et al.
patent: 2004/0228429 (2004-11-01), Schanke et al.
patent: 2005/0024926 (2005-02-01), Mitchell et al.
patent: 2005/0141661 (2005-06-01), Renaud et al.
patent: 1383623 (2002-12-01), None

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