Circuit and method for adjusting timing alignment using...

Details Circuit and method for adjusting timing alignment using... Circuit and method for adjusting timing alignment using...

2008-04-22

2008-04-22

Fan, Chieh M. (Department: 2611)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

C375S149000, C375S150000, C375S152000, C375S343000

Reexamination Certificate

active

07362840

ABSTRACT:
A method is provided for adjusting timing alignment in which a receiver generates a plurality of imbalanced correction codes (1310), and square waves both having the same frequency. The receiver mixes the imbalanced correction codes with the square waves to create a mixed signal (1320), and integrates the mixed signal over a correction code period to generate a signal power value (1330). The receiver adjusts a phase of the square wave in a first direction when the signal power value satisfies a first criterion (1340, 1350), and in a second direction when the signal power value satisfies a second criterion (1340, 1360). Each imbalanced correction code is symmetrical. And a total integrated value of one of the imbalanced correction codes over the correction code period is either above a first threshold, or below a second threshold, the first threshold being greater than or equal to the second threshold.

REFERENCES:
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patent: 5963581 (1999-10-01), Fullerton et al.
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patent: 6965630 (2005-11-01), Miller et al.
patent: 7212799 (2007-05-01), Miller et al.
patent: 2005/0175076 (2005-08-01), Miller et al.

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