Circuit and method for addressing a texture cache

Details Circuit and method for addressing a texture cache Circuit and method for addressing a texture cache

2005-08-02

2005-08-02

Bella, Matthew C. (Department: 2676)

Computer graphics processing and selective visual display system

Computer graphics display memory system

Texture memory

C345S557000, C345S568000, C345S582000, C711S003000, C711S118000, C711S216000

Reexamination Certificate

active

06924811

ABSTRACT:
A method of storing a texel in a texel cache comprising reading a t coordinate of the texel, the t coordinate comprising a plurality of bits, reading a s coordinate of the texel, the s coordinate comprising a plurality of bits, forming an offset by concatenating bits of the t coordinate with bits of the s coordinate and forming an index by concatenating bits of the t coordinate with bits of the s coordinate is discussed.

REFERENCES:
patent: 6353438 (2002-03-01), Van Hook et al.

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