Chipset support for managing hardware interrupts in a...

Details Chipset support for managing hardware interrupts in a... Chipset support for managing hardware interrupts in a...

2007-02-13

2007-02-13

Ray, Gopal C. (Department: 2111)

Electrical computers and digital data processing systems: input/

Interrupt processing

C710S266000, C710S048000, C712S224000

Reexamination Certificate

active

10676890

ABSTRACT:
In one embodiment, an apparatus includes a set of multiplex blocks coupled with an interrupt controller and multiple interrupt request lines, and a virtual machine monitor block (VMM) coupled to the set of multiplex blocks. Each multiplex block corresponds to a distinct interrupt request line. Each multiplex block is to route the interrupt request signal received via the corresponding interrupt request line either to the interrupt controller or the VMM block depending on a current configuration value of this multiplex block.

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