Chip-size packages assembled using mass production techniques at

Details Chip-size packages assembled using mass production techniques at Chip-size packages assembled using mass production techniques at

1997-12-12

1999-12-21

Picardat, Kevin M.

Semiconductor device manufacturing: process

Bonding of plural semiconductor substrates

Thinning of semiconductor substrate

438458, 438464, H01L 2130

Patent

active

060048670

ABSTRACT:
A chip-size package includes a semiconductor chip having a plurality of input/output pads on an active surface and a passivation layer covering the active surface such that the pads are exposed. Attached to the chip is a substrate having a plurality of electrically conductive traces and corresponding terminal pads therein. A bottom portion of each of the traces is exposed at the bottom surface of the substrate so that the traces are mechanically and electrically bonded to one of the input/output pads. The terminal pads are formed on a top portion of each of the traces and are exposed to a top surface of the substrate. Accordingly, the terminal pads are not limited to being located over the center or the periphery of the chip where the input/output pads are located, but rather can be arranged over the entire area of the chip to produce a chip-size package capable of mass production.

REFERENCES:
patent: 5024970 (1991-06-01), Mori
patent: 5223450 (1993-06-01), Fusino et al.
patent: 5270261 (1993-12-01), Bertin et al.
patent: 5346848 (1994-09-01), Grupen-Shemansky et al.
patent: 5691248 (1997-11-01), Cronin et al.
Robert T. Crowley et al., "Chip-Size Packaging Developments", TechSearch International, Inc., Aug. 1995, pp. 1-4.

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