Chip scale package with open substrate

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...

Reexamination Certificate

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Details

C438S109000, C438S118000, C438S119000, C438S122000, C438S123000, C438S124000, C438S126000, C438S613000, C438S928000

Reexamination Certificate

active

07008820

ABSTRACT:
A method for manufacturing an integrated circuit package comprises forming a substrate by forming a core layer with a through opening and vias. A first conductive layer is formed on the core layer covering the through opening and a second conductive layer is formed on the core layer opposite the first conductive layer in the through opening and in the vias contacting the first conductive layer. An integrated circuit die is bonded to the second conductive layer and in the through opening. Connections are formed between the integrated circuit die and the second conductive layer, and the integrated circuit die and the connections are encapsulated.

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