Chip-packaging substrate

Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame – With structure for mounting semiconductor chip to lead frame

Reexamination Certificate

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Details

C257S666000

Reexamination Certificate

active

06838756

ABSTRACT:
A chip-packaging substrate. The substrate is capable of reducing damage during packaging, shrinking its connecting portions so that the length of any of the gap slots between the packaging portion and the frame portion of the substrate is increased. Furthermore, a dummy layer is provided to one surface of the frame portion to flush the surface on the frame portion with that of the packaging portion as much as possible.

REFERENCES:
patent: 5859471 (1999-01-01), Kuraishi et al.
patent: 6284572 (2001-09-01), Cantillep et al.

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