Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Reexamination Certificate
2007-09-25
2007-09-25
Parekh, Nitin (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
C257S737000, C257S784000, C257S786000, C257SE23068
Reexamination Certificate
active
11195655
ABSTRACT:
A chip packaging structure without leadframe includes a bare chip having one surface provided with a plurality of contacts, and an adhesive and a fixing layer sequentially attached to the surface of the bare chip with the contacts, and a plurality of lead wires sandwiched between the adhesive and the fixing layer. Each of the lead wires has an inner end electrically connected to one of the contacts on the bare chip via an inner connecting window area provided on the adhesive layer corresponding to the contacts on the bare chip, and an outer end extended to one of multiple outer connecting window areas provided on the fixing layer to electrically connect to one of many external conducting bodies implanted in and exposed from the outer connecting window areas, such that no leadframe is needed to enable further reduced volume and decreased packaging cost of the whole chip packaging structure.
REFERENCES:
patent: 5990546 (1999-11-01), Igarashi et al.
patent: 6181569 (2001-01-01), Chakravorty
Domintech Co., Ltd.
Parekh Nitin
LandOfFree
Chip packaging structure without leadframe does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Chip packaging structure without leadframe, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Chip packaging structure without leadframe will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3759363