Chip package with die and substrate

Details Chip package with die and substrate Chip package with die and substrate

2008-07-08

2008-07-08

Chambliss, Alonzo (Department: 2892)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With contact or lead

C257S758000, C257S773000, C257S780000, C257SE23021, C438S110000, C438S120000, C438S622000

Reexamination Certificate

active

10996535

ABSTRACT:
A thin film semiconductor die circuit package is provided utilizing low dielectric constant (k) polymer material for the insulating layers of the metal interconnect structure. Five embodiments include utilizing glass, glass-metal composite, and glass/glass sandwiched substrates. The substrates form the base for mounting semiconductor dies and fabricating the thin film interconnect structure.

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Novel Microelectronic Packaging Method for Reduced Thermomechanical Stresses on Low Dielectric Constant Materials, R.M. Emery et al., Intel Corp., Chandler, AZ.

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