Chip package structure

Details Chip package structure Chip package structure

2007-08-28

2007-08-28

Williams, Alexander Oscar (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Flip chip

C257SE23069, C257SE23021, C257SE23068, C257SE23101, C257SE25012, C257S737000, C257S738000, C257S787000, C257S788000, C257S789000, C257S790000, C257S791000

Reexamination Certificate

active

11160924

ABSTRACT:
A process for fabricating a chip package structure with the following steps is provided. First, a chip having an active surface is provided. A plurality of solder bumps is disposed on the active surface. Then, a polymer material including flux is placed on the surface of the solder bumps by a dipping process. The chip is disposed on a carrier such that the carrier is in contact with the solder bumps. A reflow process is carried out so that the chip and the carrier are electrically connected through the solder bumps and a plurality of supporting structures made from the polymer material are formed around the junctions between the solder bumps and the carrier. The supporting structures enhance the endurance of the solder bumps to thermal stress and reduce damage due to fatigue.

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