Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings
Reexamination Certificate
2006-04-05
2009-02-03
Zarneke, David A (Department: 2891)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Multiple housings
C257SE25003, C257SE23151
Reexamination Certificate
active
07485953
ABSTRACT:
A chip package structure including a substrate, a first chip and a second chip is provided. The first contacts and the second contacts of the substrate are respectively arranged to reside on a first side region and a second side region of the substrate. The first chip disposed on the substrate and has a plurality of first bonding pads arranged to reside on a first wire-bonding region of the first chip adjacent to the first contacts and are electrically connected to the first contacts via a plurality of first wires. The second chip is disposed on the first chip away from the symmetrical center of the first chip. The second chip has a plurality of second bonding pads arranged to reside on a second wire-bonding region of the second chip adjacent to the second contacts and are electrically connected to the second contacts via a plurality of second wires.
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J.C. Patents
United Microelectronics Corp.
Zarneke David A
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