Chip package

Details Chip package Chip package

2006-06-26

2009-12-29

Clark, S. V (Department: 2823)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Flip chip

C257S786000

Reexamination Certificate

active

07638881

ABSTRACT:
A chip package including a chip, a package substrate, and a plurality of bumps is provided. The chip has a plurality of chip pads disposed on a surface of the chip. The package substrate has a plurality of first substrate pads, a plurality of second substrate pads, and a surface bonding layer. The first substrate pads and second substrate pads are disposed on a surface of the package substrate. The surface bonding layer is disposed on the first substrate pads and second substrate pads, and covers a part of each second substrate pad. The bumps are respectively disposed between the chip pads and the surface bonding layer. The chip is electrically connected to the package substrate through the bumps. Each first substrate pad is electrically connected to one of the bumps, and each second substrate pad is electrically connected to at least two of the bumps.

REFERENCES:
patent: 4963002 (1990-10-01), Tagusa et al.
patent: 5615031 (1997-03-01), Saiuchi et al.
patent: 6111628 (2000-08-01), Shiota et al.
patent: 7129586 (2006-10-01), Kashiwazaki
patent: 2003/0062623 (2003-04-01), Ono et al.
patent: 2004/0262753 (2004-12-01), Kashiwazaki
patent: 2007/0182019 (2007-08-01), Nishimura

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