Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With semiconductor element forming part
Reexamination Certificate
2000-02-29
2002-02-26
Gandhi, Jayprakash N. (Department: 2841)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With semiconductor element forming part
C257S432000, C257S434000, C257S680000, C257S777000, C438S025000, C438S026000, C438S027000, C438S064000, C438S065000, C438S066000, C438S068000, C438S033000, C361S820000
Reexamination Certificate
active
06351027
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention is directed to a chip mounted enclosure (“CME”) for a transducer element on an integrated circuit chip or wafer.
2. Description of the Related Art
Many transducer elements used in conjunction with integrated circuits require isolation from environmental conditions or controlled interaction with the environment. For example, transducer elements that include opto-electronic components, such as light-emitting diodes, semiconductor lasers, and photodetectors, can degrade in high humidity and often require hermetically sealed enclosures. In addition, opto-electronic components usually require precision alignment with optical elements. Some electrical transducers for position, vibration, pressure, temperature, chemicals, radiation, etc. require controlled access to the environment and may have precision alignment requirements as well.
Conventional enclosures use discrete packages for housing the transducer elements. The package provides for electrical interconnection, mechanical protection and alignment, and controlled interaction with the environment. The transducer element is packaged individually. Alignment is usually accomplished at this or the next level of assembly. The integrated circuit to which the transducer element is electrically connected is mounted separately, usually in another package.
This discrete packaging approach has significant disadvantages. The discrete packages are usually large relative to the transducer size, and assembly methods require handling of individual transducer elements and packages. Moreover, the performance of some transducer elements, such as sensors, is limited by the mass in the package volume. The physical separation necessitated by discrete packaging results in a larger overall assembly. The package cost scales with its size, as do the system costs because of the density penalties. The inherent distance between the transducer element and the integrated circuit degrades high-speed and sensitivity performance of the system. Additionally, the references for mechanical alignment are usually remote, which reduces the precision of alignment.
An example of a conventional form of packaging is that used in optical communications. An opto-electronic component is often mounted in a “TO-can” with a transparent window. The hermetic TO package consists of a round metal base, a cylindrical metal sidewall that is welded or crimped to the base, and a round, usually glass, window. The opto-electronic component is mounted on the base so that light passes to or from it through the window. The opto-electronic component is wirebonded to electrical leads that extend through glass seals in the base.
The assembled TO-can is generally mounted by its leads to a printed circuit board (PCB) which provides electrical interconnection to the separately packaged integrated circuit. The electrical signals must traverse the wirebonds and TO-can leads, PCB vias and traces, and the IC package leads and wirebonds. The parasitic electrical elements associated with this path limit the operating frequency range and contribute to electromagnetic emissions. Using present-day manufacturing processes and designs, this system will support maximum frequencies of operation of 1-2 GHz, such as seen in S. H. Hall, et al., “VCSEL Electrical Packaging Analysis and Design Guidelines for Multi-GHz Applications,” IEEE Trans. Comp., Packag., Manufct. Technol. B, vol. 20, no. 3, pp. 191-201, Aug., 1997.
TO-packages are manufactured with relatively large mechanical tolerances in comparison to those required in optical systems. Also, once an opto-electronic device is mounted and sealed in a TO-package, there is no access to mechanical features on the device. The external optics are individually aligned in a separate operation generally using visual reference or active feedback. These methods take longer and require more expensive equipment than some passive alignment techniques utilizing mechanical interaction.
Thus, what is needed is an enclosure for a transducer element and a method of making the same that minimizes the aforementioned problems of conventional packaging approaches.
SUMMARY OF THE INVENTION
According to one embodiment of the present invention, a chip mounted enclosure (“CME”) comprises a base formed by an integrated circuit chip, a transducer element disposed on the base, a side piece surrounding the transducer element that is coupled to the base, and a top piece coupled to the side piece.
According to another embodiment of the present invention, a method of making a chip mounted enclosure comprises mounting a transducer element to a planar surface of an integrated circuit chip. A side piece, coupled to the planar surface, is fabricated to surround the transducer element. A top piece of the CME is placed on the side piece.
According to a preferred embodiment, individual CMEs can be fabricated from a wafer assembly. Transducer elements are each mounted to an integrated circuit wafer that comprises corresponding IC chips. A side piece structure comprising corresponding side pieces is bonded to the IC wafer such that the transducer elements are individually surrounded by side pieces. A top piece is bonded to the side piece structure such that the transducer elements are individually fully enclosed. Individual CMEs are formed by singulating the wafer assembly.
With the apparatus and methods according to several of the embodiments of the present invention, distinct advantages over conventional devices can be achieved. For example, a CME can be constructed of small size in a wafer scale assembly that reduces materials consumption and manufacturing costs. Multiple CMEs can be manufactured in a straightforward and cost effective manner. The CME can have a small volume and mass to minimize mass storage and inertia effects. The small size of the CME can also minimize electrical parasitics that limit system performance. In addition, the CME can provide a hermetically sealed cavity for a transducer element. Alternatively, a CME can permit controlled access to the environment, e.g., for metering purposes.
Further features of the invention form the subject matter of the claims and will be explained in more detail, in conjunction with further advantages of the invention, with reference to exemplary embodiments.
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Stephen H. Hall et al; “VCSEL Electrical Packaging Analysis and Design Guidelines for Multi-GHz Applications”; IEEE Transactions on Components, Packaging, and Manufacturing Technology—Part B, vol. 20, No. 3, pp. 191-201; Aug. 1997.
Giboney Kirk S.
Simon Jonathan
Agilent Technologie,s Inc.
Gandhi Jayprakash N.
Vigushin John B.
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