Chip and multi-chip semiconductor device using thereof and...

Details Chip and multi-chip semiconductor device using thereof and... Chip and multi-chip semiconductor device using thereof and...

2006-10-17

2006-10-17

Clark, Jasmine (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Alignment marks

C257S685000, C257S686000, C257S723000, C257SE25005, C257SE25029, C257SE25029, C257SE25027, C257SE23085, C257S774000

Reexamination Certificate

active

07122912

ABSTRACT:
The chip for the multi-chip semiconductor device having the markings for alignment formed on the front surface and/or the back surface of the chip only by the processing from the front surface of the chip (photolithography, etch) and the method for manufacturing same are presented, without adding any dedicated process step to the formation process for the marking for alignment. In the chip for the multi-chip semiconductor device having two or more electroconductive through plug in one chip for the multi-chip semiconductor device, one or more electroconductive through plugs are employed for the marking for alignment, and the chip is configured to allow identification of the marking for alignment on the front surface and/or the back surface of the chip for the multi-chip semiconductor device. Then, an insulating film is provided on the front surface and/or the back surface of the electrically conducting through plug.

REFERENCES:
patent: 6087719 (2000-07-01), Tsunashima
patent: 6809421 (2004-10-01), Hayasaka et al.
patent: 6841469 (2005-01-01), Sawada et al.
patent: 10-303364 (1998-11-01), None
patent: 2000-228487 (2000-08-01), None
patent: 2000-228488 (2000-08-01), None
patent: 2001-217387 (2001-08-01), None
patent: 2002-76247 (2002-03-01), None

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