Chemical plasma treatment for rounding tungsten surface spires

Semiconductor device manufacturing: process – Making passive device – Stacked capacitor

Reexamination Certificate

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C438S396000, C438S253000

Reexamination Certificate

active

06180484

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a tungsten forming process, and more especially, to a method using chemical plasma treatment to improve the tungsten surface property.
2. Description of the Prior Art
In the electronic and semiconductor industry, conductive materials are applied to be the electrodes of designed devices and the contacts or connections between them. As one of the widely used conductive metal materials in modern semiconductor integrated circuit technology, tungsten is employed in variety of semiconductor structure, including contact barriers, MOS gate interconnects, and so on.
In comparison with other high electrical conductivity metals like aluminum, tungsten is not the most preferred material for conductive layer such as electrodes or interconnects due to its higher electrical resistivity. With the benefits of low electrical resistivity and compatibility with the matrix substance of silicon dioxide, aluminum is emerged as the most important material for the application of interconnects. But aluminum metallization for interconnects suffers from its inability to withstand high temperature processing, which precludes its use in self-aligned MOS processing. This is not the case for tungsten. The applicability of tungsten to VLSI interconnect application has been considered, and extensive efforts have been directed towards developing the chemical vapor deposition (CVD) of tungsten thin film for such application. Processes for forming CVD-tungsten films both in selective and blanket deposition modes have been successfully pursued.
The chemical vapor deposition of tungsten is generally performed with the well-suited source gas of tungsten hexafluoride, WF
6
. Tungsten hexafluoride can be reduced by silicon, hydrogen or silane. The reaction equations are list as follows. The silicon reduction is given by
2WF
6(g)
+3Si
(s)
→2W
(s)
+3SiF
4(g)
  (1)
The hydrogen reduction is given by
2WF
6(g)
+3H
2(g)
→W
(s)
+6HF
(g)
  (2)
The silane reduction is given by
WF
6(g)
+SiH
4(g)
→W
(s)
+SiF
6(g)
+2HF
(g)
+3H
2(g)
  (3)
or
2WF
6(g)
+3SiH
4(g)
→2W
(s)
+3SiF
6(g)
+6H
2(g)
  (4)
In addition, tungsten hexafluoride can be reduced by Al and Ti through
WF
6(g)
+2Al
(s)
→W
(s)
+2AlF
3(g)
  (5)
WF
6(g)
+3Ti
(s)
→W
(s)
+3TiF
4(g)
  (6)
In practice, the process is more complex, with several intermediate reaction products such WF
4
and WF
5
involved. Other source gases such as WCl
6
have also been employed in the hydrogen reduction.
CVD-tungsten appears to be an excellent candidate material for interconnect applications because of its advantaged properties of low resistivity, low stress, and so on. For example, tungsten has a high melting point at the temperature of about 3410° C., and it makes the following high temperature processes possible. The thermal expansion coefficient of tungsten, which closely matches that of silicon, is also a benefit, because it can reduce the stress between tungsten film and silicon. Moreover, tungsten has good electromigration resistance and can form low resistance contacts to silicon. Tungsten has none of the stoichiometry control problem, and that often plague silicides. Most important, tungsten deposited by chemical vapor deposition (CVD) exhibits excellent conformal step coverage, which is a serious problem to the better conductor, aluminum.
Due to the excellent deposition conformability, the most successfully commercial application of tungsten is contact hold filling, which is usually referred as metal plug process and wherein sputtered aluminum is not suitable because of its poor step coverage. In addition, tungsten films have found application as bottom electrodes of the capacitors of dynamic random access memory (DRAM) cells and low-resistance gate interconnections. Moreover, contact barrier materials and ohmic contacts are also considered uses for tungsten.
With all the advantages mentioned above, tungsten still suffers from surface problem when it is used to be the materials of electrodes or interconnecting lines. Although the grain size is not large, tungsten grows into ragged morphology that is shown in
FIG. 1
, wherein illustrating a semiconductor substrate
10
and deposited tungsten layer
20
. As can be seen, the surface of the tungsten layer
20
consists of the as-grown crystal facets with no preferred orientation everywhere. Spires is formed all over the surface and will enhance the local electric field, which results in decrease of the breakdown voltage and increase of leakage current for the conductive layer. Furthermore, rugged surface has poor reflectivity and will cause patterning difficult due to the random reflection of light during the photolithography process.
SUMMARY OF THE INVENTION
A method for forming a tungsten film with a good surface property is disclosed. This method utilizes a chemical plasma treatment to round the tungsten surface and to improve the leakage issue of tungsten conductive film. A preferred embodiment for fabricating a capacitor of a DRAM cell with tungsten bottom storage electrode is described as follows.
Forming an inter-layer dielectric on a semiconductor substrate and the contact hole pattern is formed in this inter-layer dielectric. A conductive layer of tungsten with a glue layer is then formed on the inter-layer dielectric and fills the contact hole. A chemical plasma treatment is now carried out to round the tungsten surface spires and result in a better surface properties. After patterning the tungsten layer to serve as the bottom electrode of a DRAM storage capacitor, another dielectric layer is formed on the substrate and covers the bottom electrode of tungsten. Finally, the top storage electrode is formed to finish the present process. A DRAM cell capacitor constructed of a tungsten bottom storage electrode, a dielectric layer and a top storage electrode is fabricated on a semiconductor substrate with electrode-dielectric interface rounded every segment.


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patent: 5780339 (1998-07-01), Liu et al.
patent: 5851878 (1999-01-01), Huang
patent: 5858853 (1999-01-01), Shishiguchi et al.
patent: 5899735 (1999-05-01), Tseng

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