Active solid-state devices (e.g. – transistors – solid-state diode – Test or calibration structure
Reexamination Certificate
2006-11-21
2006-11-21
Vinh, Lan (Department: 1765)
Active solid-state devices (e.g., transistors, solid-state diode
Test or calibration structure
C257S052000, C438S692000, C451S241000
Reexamination Certificate
active
07138654
ABSTRACT:
A chemical-mechanical polishing (CMP) proximity correction method for polishing a wafer is provided. The wafer has a polish area and a protected area. The method includes forming a material layer over the wafer to cover the polish area and the protected area and then forming a protective layer over the material layer. Thereafter, the protective layer is patterned so that the remaining protective layer is at a distance away from the boundary of the polish area to reduce shadowing effects. Because the boundary of the protective layer above the material layer recedes to an area at a distance away from polish area, the whole polish area can be cleanly polished.
REFERENCES:
patent: 6759345 (2004-07-01), Kawano
Chen Yu-Chia
Sun Pai-Hsuan
Yu Tu-Hao
J.C. Patents
Vinh Lan
Winbond Electronics Corp.
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