Compositions – Etching or brightening compositions
Reexamination Certificate
1998-12-18
2002-05-28
Kunemund, Robert (Department: 1765)
Compositions
Etching or brightening compositions
C252S079400, C438S692000
Reexamination Certificate
active
06395194
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a chemical mechanical polishing (CMP) composition and to a method of using same for removing noble metals in a CMP process.
2. Description of the Related Art
There is currently a major effort in semiconductor companies, worldwide, to commercialize high dielectric constant and ferroelectric thin films in advanced DRAMs and ferroelectric random access memories (FeRAMs), respectively. These materials include BaSrTiO
3
(BST) for DRAMs and PbZrTiO
3
(PZT) and SrBi
2
Ti
2
O
9
(SBT) for FeRAMs.
It is well known that these materials require electrodes made from noble metals or noble metal alloys such as Pt, Ir, IrO
2
, Pt—Ru, etc., and sub-micron patterning of both the noble metals and the ferroelectric films is very difficult because of the absence of volatile products for the elemental constituents. State-of-the-art dry etching processes for Pt and Ir are known to have fundamental difficulties due to the predominantly physical (not chemical) mechanism for material removal, resulting in formation of unwanted structures (sometimes called “ears”) at the edges of the electrodes.
Prior copending U.S. patent application Ser. No. 08/975,366 filed Nov. 20, 1997 in the names of Peter C. Van Buskirk and Peter S. Kirlin for “Chemical Mechanical Polishing of FeRAM Capacitors,” describes the use of CMP methodology in the fabrication of ferroelectric or high permittivity sub-micron integrated capacitors, to etch noble metal films and perovskite oxide thin film layers, without the use of reactive ion etching (RIE) or similar methods. In the method of this application, a ferroelectric capacitor structure is fabricated by sequentially depositing a bottom electrode layer, a ferroelectric layer and a top electrode layer on a base structure, optionally with deposition of a layer of a conductive barrier material beneath the bottom electrode layer, to form a capacitor precursor structure. This capacitor precursor structure is planarized by chemical mechanical polishing to yield the ferroelectric capacitor structure, e.g., a stack capacitor or trench capacitor. The process is carried out without dry etching of the electrode layers or dry etching of the ferroelectric layer, to yield ferroelectric capacitors having a very small feature size, as for example between 0.10 and 0.20 &mgr;m.
In addition to the absence of the undesirable dry etching methods, other advantages of the CMP approach of this pending patent application include fewer mask levels, fewer process steps, and an inherently planarized capacitor structure that facilitates subsequent metallization.
The method of this pending application involves forming a stop layer at the planarization depth in the dielectric insulating material, wherein the stop layer has a substantially lower CMP removal rate than the device structure materials under CMP conditions, so that the removal of the device structure material by CMP under CMP conditions is terminated at the planarization depth by the stop layer. In a preferred aspect, such method is used to fabricate a ferroelectric capacitor structure by sequentially depositing a bottom electrode layer, a ferroelectric layer and a top electrode layer on a base structure, to form a capacitor precursor structure, and planarizing the capacitor precursor structure by CMP to yield the ferroelectric capacitor structure, e.g., a stack capacitor or trench capacitor. Such method also may be carried out without dry etching of the electrode layers or dry etching of the ferroelectric layer, to yield ferroelectric capacitors having a very small feature size, as for example between 0.10 and 0.20 &mgr;m.
The art continues to seek new CMP techniques and compositions for carrying out CMP processes.
There is especially a need for providing CMP techniques and compositions that are particularly adapted for removal of noble metal films such as are employed in the fabrication of electrode structures for semiconductor devices.
It therefore is an object of the present invention to provide improved CMP techniques and compositions.
It is another object of the invention to provide improved CMP techniques and compositions suitable for selective removal of noble metals and noble metal alloys, e.g., of gold, platinum, iridium, etc. from semiconductor device structures having such noble metal-based materials deposited on or otherwise present in the device structure.
Other objects and advantages of the present invention will be more fully apparent from the ensuing disclosure and appended claims.
SUMMARY OF THE INVENTION
The present invention relates to a CMP method and composition suitable for selective removal of noble metals and noble metal alloys from semiconductor device structures having such noble metal-based materials deposited on the device structure.
In one aspect, the invention relates to a method of removing noble metal material from a substrate having said noble metal material deposited on the substrate, comprising subjecting the substrate to chemical mechanical polishing with a chemical mechanical polishing composition, wherein the chemical mechanical polishing composition comprises abrasive polishing particles and a halide-based oxidizing agent.
In a specific method embodiment, the invention relates to a method of fabricating a microelectronic device structure including a layer of noble metal material thereon that is patterned to define an electrode structure of a product microelectronic device, comprising planarizing the layer of noble metal material by chemical mechanical polishing using a composition comprising abrasive particles and a halide-based oxidizing agent, wherein the halide-based oxidizing agent is reactive with the noble metal material to provide chemical removal action on the noble metal material in the chemical mechanical polishing.
Another aspect of the invention relates to an aqueous polishing slurry composition, for use in a chemical mechanical polishing process to remove noble metal and/or noble metal alloy from a substrate having said noble metal and/or noble metal alloy deposited on the substrate, in which the composition comprises abrasive polishing particles and a halide-based oxidizing agent.
In a particular compositional embodiment, the halide-based oxidizing agent of the invention has the following composition by weight, based on the total weight (100%) of the composition:
Compound
Amount (wt. %)
anionic surfactant
0-4%
ammonium bromide
12-18%
potassium bromate
4-6%
citric acid
1-4%
DI Water
-balance-
Other aspects, features and embodiments of the invention will be more fully apparent from the ensuing disclosure and appended claims.
REFERENCES:
patent: 3775201 (1973-11-01), Basi
patent: 4983650 (1991-01-01), Sasaki
patent: 5700383 (1991-01-01), Feller et al.
patent: 5104421 (1992-04-01), Takizawa
patent: 5157876 (1992-10-01), Medellin
patent: 5340370 (1994-08-01), Cadien et al.
patent: 5527423 (1996-06-01), Neville et al.
patent: 5645736 (1997-07-01), Allman
M. Fayolle et al., “W CMP process integration: consumables evaluation—electrical results and end point detection”, Microelectronic Engineering, 37/38 (1997) pp. 347-352.
M. Hoshino et al., “Chemical Mechanical Polishing of Metalorganic chemical vapor deposited golf for LSI interconnection”, Jpn. J. Appl. Phys. 32 (1993) Pt. 2, No. 3B.
Emond George E.
Russell Michael W.
Van Buskirk Peter C.
Wolk Jonathan J.
Chappuis Margaret
Hultquist Steven J.
Intersurface Dynamics Inc.
Kunemund Robert
Umez-Eronini Lynette T.
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