Chemical mechanical polishing and method for manufacturing...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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Details

C451S036000, C257SE21230, C257SE21304, C257SE21571

Reexamination Certificate

active

07605074

ABSTRACT:
Provided is a CMP method. According to the CMP method, an interlayer insulating layer having two or more layers is etched to form a trench and/or via hole, and a combined thickness of the two or more layers are measured. A barrier metal layer and a metal layer are sequentially formed in the trench and/or via hole. Portions of the metal layer, the barrier metal layer and the interlayer insulating layer are removed. After that, the combined thickness of the two or more insulating layers is measured again.

REFERENCES:
patent: 6914000 (2005-07-01), Kamada
patent: 7084056 (2006-08-01), Won

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