Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2005-09-06
2005-09-06
Beausoliel, Robert (Department: 2114)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S015000
Reexamination Certificate
active
06941489
ABSTRACT:
The invention performs an extra read from a register of a register file prior to writing to that register. The data from the extra read is stored in a buffer (e.g., another register file). After a “checkpoint” period, a check is made as to whether any data errors have occurred; if there are no errors, the buffer is flushed and processing continues per normal; if there are errors, the register file is rewritten with contents from the buffer and the program counter is reset to the prior checkpoint, wherein after processing re-executes program instructions from the last checkpoint. The checkpointing period may be defined by the memory size of the buffer; typically that buffer has a fraction of the memory capacity of the register file, since a flush occurs at every checkpoint. The register file of the invention may utilize an extra read port with the register file to perform the extra read. The extra read may occur for every write to the register file; alternatively, the extra read may occur for a subset of the writes to the register file.
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patent: 6629271 (2003-09-01), Lee et al.
Chu Gabriel L.
Hewlett--Packard Development Company, L.P.
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