Radiant energy – Inspection of solids or liquids by charged particles – Electron probe type
Reexamination Certificate
2002-09-23
2003-06-17
Lee, John R. (Department: 2881)
Radiant energy
Inspection of solids or liquids by charged particles
Electron probe type
C250S306000, C250S311000, C250S3960ML, C250S3960ML, C250S397000, C250S398000, C250S492200
Reexamination Certificate
active
06580075
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a beam scanning type inspecting apparatus for performing inspection by scanning a beam.
JP-A-5-258703 (U.S. patent application Ser. No. 710,351 filed on May 30, 1991. Continuation application matured to U.S. Pat. No. 5,502,306) describes an apparatus for automatic inspection of X-ray masks and other conductive substrates. In the inspecting system, an electron beam image obtained by scanning a mask with an electron beam is compared with a reference to detect a defect. The inspecting system has detection modes which are a die/die mode for comparison between two dice and a die/database mode for comparison of a die with a database of a CAD.
For the sake of scanning the electron beam, the inspecting system has a deflector controller and an analog deflection circuit.
The deflector controller calculates a desired movement of a stage and sends a signal corresponding to the amount of movement to a stage servo. The deflector controller also calculates a desired deflection of the beam and sends its data to the analog deflection circuit.
The data sent from the deflector controller to the analog deflection circuit indicates a slope value which is an inclination amount of a ramp wave and this digital signal is converted into an analog voltage by means of the analog deflection circuit. A ramp generator generates the ramp wave on the basis of the analog voltage. In the inspecting system, controllable state quantities are the slope value indicative of the inclination amount of the ramp wave and a retrace value indicative of the amount of swing return of the ramp wave. The inclination amount of the analog signal designated by the slope value is compared with a line size value which is an adjusting value and an offset value designated by the retrace value is compared with an biased value which is an adjusting value. Comparison results are fed back in an analog fashion. An information fetching position is prescribed by using an external inspection start/end signal.
The scheme in which the deflection circuit is constructed of an analog integrating circuit as in this inspecting system will hereinafter be called an analog scheme.
On the other hand, with the miniaturization technology advanced, an integrated circuit manufactured by utilizing the inspecting system as above is designed at present such that for example, a 256 mega DRAM has a line width of about 0.25 &mgr;m. Concomitantly with the miniaturization, inspection of particles and pattern defect has been considered to be more important in present-day inspecting apparatus than in the conventional inspecting apparatus.
But the analog deflection scheme employed in the conventional inspecting system faces problems as below.
In the analog deflection scheme, a high-precision analog integrating circuit is used to conduct a constant operation which is required of high linearity. But because of leakage current in operational amplifiers, capacitors and resistors, the linearity is distorted and the distortion is difficult to correct.
Further, only a portion of less linearity error is used by using the external inspection start/end signal, thus raising a problem that a positional difference is caused by a difference in time accuracy between a start/end signal generator circuit and an analog signal generator circuit.
Further, the accuracy is sometimes compensated by an analog feedback loop and in that case, an error is caused during a time interval which starts immediately after the setting is changed and ends when stabilization is reached, making it impossible to deal with high-speed setting change.
Further, in general, there exists biased distortion due to non-uniform electric fields and magnetic fields in the deflector and the column of the inspecting apparatus but the biased distortion is difficult to correct in the analog scheme.
Especially, when pattern comparison for separate sites as represented by chip comparison inspection is carried out, differences in large positional offset attributable to cumulation of errors and in error and distortion of arrangement (rotation and size) caused when drawing is performed on two patterns to be compared cannot be corrected, with the result that the positional accuracy matters and disadvantageously, the comparison inspection cannot proceed satisfactorily.
Further, because of difficulties in the distortion correction, a site subject to non-uniform biased distortion as represented by the wafer outer periphery cannot be inspected.
In addition, when conducting the pattern comparison inspection for the separate sites without changing and correcting the setting, elimination of distortion and maintenance of high accuracy are required for the whole of the apparatus, especially, for the optical system, the deflection unit and deflector and the stage inclusive of its control system. As a result, the cost is raised as a whole and the fabrication term is elongated in connection with tuning owing to difficulties in keeping accuracies caused by the distortion and errors.
Further, when the wafer size is increased, for example, when the wafer diameter is increased to 12 inches to increase the inspection area, the demand for high speed and high accuracy is accelerated.
On the other hand, in realizing a high-speed high-precision digital operation processor, problems as below are encountered.
To conduct a high-precision high-speed operation, real number operation processes must be executed in a parallel pipe line fashion and a great number of transistors are needed. In addition, since the real number operation process is interlinked to a controller operative on real time, it is necessary to keep the latency small in the process and besides, from the standpoint of reduction of wiring, the construction must be compact. Therefore, a very highly integrated LSI or electronic board must be materialized and high-quality logic design technology and transistor number reduction technology are required.
To meet the above requirements, many transistors in a small area are frequently subjected to switching operation and concomitantly, a large amount of heat will be generated. Circuit design for suppressing heat generation must be contrived.
However, this leads to a large-scale and complicated circuit construction which is costly.
Also, smooth interchange of information must be effected in synchronism with a high-speed clock between a master processor and the high-speed digital operation processor. A conventional means using a 2-port memory faces problems of limited access speed and access conflict of memory devices and the high-speed operation is difficult to achieve.
Further, to apply a command value to a subject to be controlled, high-precision high-speed control output operation data must be converted into a predetermined analog signal.
In the digital/analog conversion, however, restriction is imposed on the high-speed high-precision digital/analog converter. More particularly, it is difficult to deliver a result of the operation process, with its error component corrected, in the form of high-precision digital data at a clock period of, for example, 10 ns or less with an accuracy of 12 bits or more, and the operation speed cannot be increased to above that level.
On the other hand, in an electron beam drawing apparatus, a deflection control system of digital scheme is adopted as described in, for example, JP-A-5-226234. The deflection in the electron beam drawing apparatus is of the multi-stage deflection type and the deflection type per se differs from that in the inspecting apparatus. Also, the demand for high-speed operation is less stringent in the drawing apparatus than in the inspecting apparatus but in the digital scheme of the inspecting apparatus, a correction signal must be delivered at a time point within the image fetching period. In this manner, technical idea of control is greatly different for the two kinds of apparatus and it is difficult to adopt the digital scheme of the electron beam drawing apparatus as it is in the inspecting apparatus.
SUMMARY OF THE INVENTI
Ike Katsuhisa
Kametani Masatsugu
Ninomiya Taku
Yamada Osamu
Yamamoto Kenjiro
Hashmi Zia R.
Lee John R.
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