Charge trapping semiconductor memory element with improved...

Details Charge trapping semiconductor memory element with improved... Charge trapping semiconductor memory element with improved...

2007-12-25

2007-12-25

Pert, Evan (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S077000, C257S314000, C257S315000, C257S316000, C257S322000, C257S324000, C257S405000, C257S406000

Reexamination Certificate

active

11359783

ABSTRACT:
A semiconductor memory element, which can be controlled via field effect, includes a semiconductor substrate of a first conduction type, a first doping region of a second conduction type provided in the semiconductor substrate, a second doping region of the second conduction type provided in the semiconductor substrate, a channel region located between the first and second doping regions, a multilayer gate dielectric which is arranged adjacent to the channel region and has a charge trapping memory layer, and a gate terminal provided above the gate dielectric. The charge trapping memory layer includes at least one sequence of adjacent layers, wherein the sequence of adjacent layers comprises an amorphous silicon carbide layer and an amorphous silicon nitride layer.

REFERENCES:
patent: 6706599 (2004-03-01), Sadd et al.
patent: 6989565 (2006-01-01), Aronowitz et al.
patent: 2003/0049900 (2003-03-01), Forbes et al.
patent: 2003/0205812 (2003-11-01), Swanson et al.
patent: 2004/0136240 (2004-07-01), Zheng et al.

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