Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2005-10-18
2005-10-18
Zarneke, David (Department: 2891)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S345000, C257S314000, C257S071000, C257S645000, C257S651000, C257S321000, C257S324000, C257S325000
Reexamination Certificate
active
06956262
ABSTRACT:
A charge trapping semiconductor device is particularly suited as a replacement for conventional pull-up and load elements such as NDR diodes, passive resistors, and conventional FETs. The device includes a charge trapping layer formed at or extremely near to an interface between a substrate (which can be silicon or SOI) and a gate insulation layer. The charge trapping device can be shut off during static operations to further reduce power dissipation.
REFERENCES:
patent: 3588736 (1971-06-01), McGroddy
patent: 3651426 (1972-03-01), Boatner et al.
patent: 3974486 (1976-08-01), Curtis et al.
patent: 4047974 (1977-09-01), Harari
patent: 4143393 (1979-03-01), DiMaria et al.
patent: 4686550 (1987-08-01), Capasso et al.
patent: 4806998 (1989-02-01), Vinter et al.
patent: 4851886 (1989-07-01), Lee et al.
patent: 4903092 (1990-02-01), Luryi et al.
patent: 4945393 (1990-07-01), Beltram et al.
patent: 5021841 (1991-06-01), Leburton et al.
patent: 5023836 (1991-06-01), Mori
patent: 5032877 (1991-07-01), Bate
patent: 5032891 (1991-07-01), Takagi et al.
patent: 5055891 (1991-10-01), Moll et al.
patent: 5084743 (1992-01-01), Mishra et al.
patent: 5093699 (1992-03-01), Weichold et al.
patent: 5130763 (1992-07-01), Delhaye et al.
patent: 5162880 (1992-11-01), Hazama
patent: 5189499 (1993-02-01), Izumi et al.
patent: 5250815 (1993-10-01), Battersby et al.
patent: 5258624 (1993-11-01), Battersby et al.
patent: 5302838 (1994-04-01), Roenker et al.
patent: 5357134 (1994-10-01), Shimoji
patent: 5390145 (1995-02-01), Nakasha et al.
patent: 5442194 (1995-08-01), Moise
patent: 5448513 (1995-09-01), Hu et al.
patent: 5455432 (1995-10-01), Hartsell et al.
patent: 5463234 (1995-10-01), Toriumi et al.
patent: 5477169 (1995-12-01), Shen et al.
patent: 5523603 (1996-06-01), Fishbein et al.
patent: 5543652 (1996-08-01), Ikeda et al.
patent: 5606177 (1997-02-01), Wallace et al.
patent: 5633178 (1997-05-01), Kalnitsky
patent: 5675157 (1997-10-01), Battersby
patent: 5689458 (1997-11-01), Kuriyama
patent: 5698997 (1997-12-01), Williamson, III et al.
patent: 5705827 (1998-01-01), Baba et al.
patent: 5732014 (1998-03-01), Forbes
patent: 5742092 (1998-04-01), Zotov et al.
patent: 5761114 (1998-06-01), Bertin et al.
patent: 5770958 (1998-06-01), Arai et al.
patent: 5773996 (1998-06-01), Takao
patent: 5798965 (1998-08-01), Jun
patent: 5804475 (1998-09-01), Meyer et al.
patent: 5843812 (1998-12-01), Hwang
patent: 5869845 (1999-02-01), Van der Wagt et al.
patent: 5883549 (1999-03-01), De Los Santos
patent: 5883829 (1999-03-01), Van der Wagt
patent: 5895934 (1999-04-01), Harvey et al.
patent: 5903170 (1999-05-01), Kulkarni et al.
patent: 5907159 (1999-05-01), Roh et al.
patent: 5936265 (1999-08-01), Koga
patent: 5945706 (1999-08-01), Jun
patent: 5953249 (1999-09-01), Van der Wagt
patent: 5959328 (1999-09-01), Krautschneider et al.
patent: 5962864 (1999-10-01), Leadbeater et al.
patent: 6015739 (2000-01-01), Gardner et al.
patent: 6015978 (2000-01-01), Yuki et al.
patent: 6075265 (2000-06-01), Goebel et al.
patent: 6077760 (2000-06-01), Fang et al.
patent: 6084796 (2000-07-01), Kozicki et al.
patent: 6091077 (2000-07-01), Morita et al.
patent: 6097036 (2000-08-01), Teshima et al.
patent: 6104631 (2000-08-01), El-Sharawy et al.
patent: 6128216 (2000-10-01), Noble, Jr. et al.
patent: 6130559 (2000-10-01), Balsara et al.
patent: 6150242 (2000-11-01), Van der Wagt et al.
patent: 6184539 (2001-02-01), Wu et al.
patent: 6194303 (2001-02-01), Alphenaar et al.
patent: 6205054 (2001-03-01), Inami
patent: 6222766 (2001-04-01), Sasaki et al.
patent: 6225165 (2001-05-01), Noble, Jr. et al.
patent: 6246606 (2001-06-01), Forbes et al.
patent: 6261896 (2001-07-01), Jun
patent: 6294412 (2001-09-01), Krivokapic
patent: 6301147 (2001-10-01), El-Sharawy et al.
patent: 6303942 (2001-10-01), Farmer
patent: 6310799 (2001-10-01), Duane et al.
patent: 6396731 (2002-05-01), Chou
patent: 6404018 (2002-06-01), Wu et al.
patent: 2001/0005327 (2001-06-01), Duane et al.
patent: 2001/0013621 (2001-08-01), Nakazato
patent: 2001/0019137 (2001-09-01), Koga et al.
patent: 2001/0024841 (2001-09-01), Noble, Jr. et al.
patent: 2001/0053568 (2001-12-01), Deboy et al.
patent: 2002/0093030 (2002-07-01), Hsu et al.
patent: 2002/0100918 (2002-08-01), Hsu et al.
patent: 2002/0109150 (2002-08-01), Kajiyama
patent: 0747940 (1996-12-01), None
patent: 0747961 (1996-12-01), None
patent: 0655788 (1998-01-01), None
patent: 1050964 (2000-11-01), None
patent: 1085656 (2001-03-01), None
patent: 1107317 (2001-06-01), None
patent: 0526897 (2001-11-01), None
patent: 1168456 (2002-01-01), None
patent: 1204146 (2002-05-01), None
patent: WO 90/03646 (1990-04-01), None
patent: WO 99/63598 (1999-04-01), None
patent: WO 00/41309 (2000-07-01), None
patent: WO 01/65597 (2001-09-01), None
patent: WO 01/69607 (2001-09-01), None
patent: WO 01/99153 (2001-12-01), None
Final Report: SMILE MEL-ARI Project n°28741—Chapter V, pp. 184-194.
News Release from www.eurekalert.org/releases/udel-udcnflb.html, “UD Computer News: Future Looks Bright for Tunnel Diodes, Promising Faster, More Efficient Circuits,” Oct. 1, 1998, 4 pages.
P. S. Barlow, et al., “Negative differential output conductance of self-heated power MOSFETs,” IEE Proceedings-I Solid-State and Electron Devices, vol. 133, Part I, No. 5, Oct. 1986, pp. 177-179.
E. Chan, et al., “Compact Multiple-Valued Multiplexers Using Negative Differential Resistance Devices,” IEEE Journal of Solid-State Circuits, vol. 31, No. 8, Aug. 1996, pp. 1151-1156.
E. Chan, et al., “Mask Programmable Multi-Valued Logic Gate Arrays Using RTDs and HBTs,” IEE Proceedings-E: Computers and Digital Techniques, vol. 143, No. 5, Oct. 1996, pp. 289-294.
Deen, Jamal (editor) et al., excerpt from “CMOS RF modeling, characterization and applications,” World Scientific, Apr. 2002, 34 pages.
Dozsa, L. et al., “A transient method for measuring current-voltage characteristics with negative differential resistance regions,” Research Institute for Technical Physics, P. O. Box 76, H-1325 Budapest, Hungary, (Received Jul. 24, 1997; accepted Aug. 1, 1997), 2 pages.
Gardner, Carl, Ringhofer, Christian, “Smooth Quantum Hydrodynamic Model Simulation of the Resonant Tunneling Diode,” Dept. Of Mathematics Arizona State University, pp. 1-5, (1998).
Geppert, Linda, “Quantum transistors: toward nanoelectronics,” IEEE Spectrum, Sep. 2000, pp. 46-51.
Goldhaber-Gordon, David et al., “Overview of nanoelectronic devices,” Proc. IEEE, 85(4), Apr. 1997, pp. 521-540.
Alejandro F. Gonzalez, et al., “Standard CMOS Implementation of a Multiple-Valued Logic Signed-Digit Adder Based on Negative Differential-Resistance Devices,” Proceedings of the 30th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2000), 6 pages.
Haddab, Y. et al., “Quantized current jumps in silicon photoconductors at room temperature,” J. Appl. Phys. 86 (7), Oct. 1, 1999, pp. 3787-3791.
G. I. Haddad et al., “Tunneling Devices and Applications in High Functionality/Speed Digital Circuits,” Solid State Electronics, vol. 41, No. 10, Oct. 1997, pp. 1515-1524.
Hansch, W. et al., “The planar-doped-barrier-FET:MOSFET overcomes conventional limitations,” ESSDERC '97 27th European Solid-State Device Research Conference, Stuttgart, Sep. 22-24, 1997, 4 pages.
C. P. Heij, et al., “Negative Differential Resistance Due to Single-Electron Switching,” Applied Physics Letters, vol. 74, No. 7, Feb. 15, 1999, 5 pages.
Hong, J.W. et al, “Local charge trapping and detection of trapped charge by scanning capacitance microscope in SiO2/Si system,” Appl. Phys. Lett., 75 (12), Sep. 20, 1999, pp. 1760-1762.
Jungel, A, Pohl, C., “Numerical Simulation of Semiconductor Devices: Energy-Transport and Quantum Hydrodynamic Modeling,” Fachbereich Math., Tech. Univ. Berlin, Germany, pp. 1-9, 1998.
Karna, Shashi P. et al., “Point defects in Sl-SlO2 systems: current understanding,” Published in G. Pacchioni e
Bever Hoffman & Harms LLP
Kubodera John M.
Menz Douglas
Synopsys Inc.
Zarneke David
LandOfFree
Charge trapping pull up element does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Charge trapping pull up element, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Charge trapping pull up element will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3487415