Charge-trap flash memory device with reduced erasure stress...

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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Details

C365S185200, C365S185110, C365S185170, C365S185180, C365S200000

Reexamination Certificate

active

08085592

ABSTRACT:
Operation methods of charge-trap flash memory devices having an unused memory cell for data storage and a normal memory cell used for data storage are discussed. The operation method may include selecting the unused memory cell, and programming the unused memory cell to have a predetermined threshold voltage. The charge-trap flash memory device may thus be provided with improved reliability by interrupting erasure stress to unused memory cells.

REFERENCES:
patent: 6388925 (2002-05-01), Kim
patent: 6771541 (2004-08-01), Park
patent: 7212437 (2007-05-01), Atti et al
patent: 2006/0133155 (2006-06-01), Fujita et al.
patent: 2007/0025167 (2007-02-01), Ziegelmayer et al.
patent: 2006-164408 (2006-06-01), None
patent: 1020000044941 (2000-07-01), None
patent: 10-0293633 (2001-04-01), None
patent: 1020010061460 (2001-07-01), None

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