Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates – Field-effect transistor
Patent
1998-10-30
2000-08-22
Tokar, Michael
Electronic digital logic circuitry
Clocking or synchronizing of logic stages or gates
Field-effect transistor
326 95, 326 97, H03K 19096
Patent
active
061078344
ABSTRACT:
An embodiment of the present invention includes a switchable conductive pathway between a number of intermediate nodes in a domino stage, up to and including every intermediate node, and a voltage source. In operation, this circuit configuration prevents the problems associated with charge sharing. The voltage, at the voltage source which is coupled to the intermediate nodes, is substantially equal to the voltage at a voltage source that is coupled by way of a domino precharge circuit to the output node of the domino stage. The switchable conductive pathways are switched on at the start of the precharge phase, and switched off at the beginning of the evaluation phase. In this way, intermediate node voltages in a domino stage are actively maintained, even after the main precharge control signal has been deasserted. Active maintenance of the intermediate nodes is suspended during the evaluation phase.
In a further aspect of the present invention, the switchable conductive pathways in the domino stages of a first domino chain are controlled by signals that are generated by a second domino chain that is parallel to the first domino chain.
REFERENCES:
patent: 5440243 (1995-08-01), Lyon
patent: 5525916 (1996-06-01), Gu et al.
Chappell Terry
Dai Kevin
Intel Corporation
Tokar Michael
Werner Raymond J.
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