Charge sharing flash clear for memory arrays

Details Charge sharing flash clear for memory arrays Charge sharing flash clear for memory arrays

1993-07-30

1994-08-09

LaRoche, Eugene R.

Static information storage and retrieval

Systems using particular element

Ternary

36518901, 36518409, 365190, 365202, 365203, 365204, 365227, G11C 700, G11C 11413

Patent

active

053372735

ABSTRACT:
A static random access memory provides interconnection of local wordlines and bit lines to share charge during bulk write operations. Prior to a bulk write cycle, a bit line for each memory cell is driven to a first voltage level. Subsequently, the bit lines and the local wordlines are interconnected for sharing charge between the bit lines and the local wordlines. Next, the bit lines are disconnected from the local wordlines and the bit lines are driven to a second voltage level while the local wordlines are driven to the first voltage level to address the memory cells. Then the bit lines and local wordlines are reconnected to distribute charge from the local wordlines to the bit lines. Lastly, the bit lines are again disconnected from the local wordlines and driven to the first voltage level preparatory to resuming normal operation.

REFERENCES:
patent: 4639898 (1987-01-01), Saver
patent: 4901279 (1990-02-01), Plass
patent: 4901284 (1990-02-01), Ochii et al.
patent: 5003510 (1991-03-01), Kamisaki
patent: 5025365 (1991-06-01), Mathur et al.

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