Charge recycling differential logic (CRDL) circuit and devices u

Details Charge recycling differential logic (CRDL) circuit and devices u Charge recycling differential logic (CRDL) circuit and devices u

1996-07-31

1999-01-12

Nelms, David

Electronic digital logic circuitry

Function of and, or, nand, nor, or not

Field-effect transistor

326 95, 326 98, 365205, H03K 19094

Patent

active

058595481

ABSTRACT:
A novel logic family, called Charge Recycling Differential Logic (CRDL) circuit, reduces power consumption by utilizing a charge recycling technique and has a speed comparable to those of conventional dynamic logic circuits. The CRDL circuit also has improved noise margin due to inherently static operation. An 8-bit Manchester carry chains and full adders were fabricated using a 0.8 .mu.m single-poly double-metal n-well CMOS technology. The measurement results indicate about 16-48% improvements in power-delay product are obtained compared with Differential Cascode Voltage Switch (DCVS) circuit.

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Saed G. Younis et al., "Practical Implementation of Charge Recovering Asymptotically Zero Power CMOS" Research on integrated systems; Proc. 1993 Symp., Cambridge, MA 1993 pp. 234-250.
Kawahara, T., et al., "A Charge Recycle Refresh for Gb-Scale DRAM's in File Applications," IEEE J. Solid-State Circuits, vol. 29, No. 6, Jun. 1994, pp. 715-722.

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